Uaa 2022 2i5b55

16 SEGMENT LED DRIVER

16 SEGMENT LED DRIVER The UAA2022 is a 16-bit serial data input to a l6-Segment L E D driver. Brightness control of common anode LED’s from an external control voltage is possible. The UAA2022 is particularly suitable for Hi-Fi applications and is implemented in I’L linear technology. l

LED brightness control voltage

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Current Source Segment driver Outputs

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No external resistors for Segment currents

8 Non-multiplexed, therefore no RFI

SILICON MONOLITHIC INTEGRATED CIRCUIT

, P SUFFIX

@ Cascadable

PLASTIC PACKAGE CASE 724

FIGURE 1 -BLOCK DIAGRAM AND PIN ASSIGNMENT

LAST SHIFTED BIT

CO

*

FIRST SHIFTED BIT

OUTPUT BUFFERS

LED TEST

LATCHES

GND

VOR CLOCK

1

16 BIT SHIFT

DATA OUT

DATA

July 1983

FIGURE 4 - TYPICAL APf’LICATION

+5v

q

1

LED DISPLAY

CLK

U A A 2 0 2 2 6.8k

DATA 22fJf DATA OUT

OUTLINE DIMENSIONS

P SUF FIX PLASTIC PACUACE CASE 724

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NOTE: 1. LEAOS. TAUE f’OSITIONE0 WITHIN 0.25 mrn fO.OlOl OIA ATSEATING PLANE AT MAXIMUM MATERIAL CONOITION (OIM. “0-T

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This information has beert carefully checked and is believed to be entirely reliable. However. no responsibility is assumed for inaccuracies. Motorola reserves the right to make changes to any products herein to improve reliability. function or design. Motorola does not assume any liability arising out of the apptication or use of any product or circuit described herein. No license is conveyed under patent rights in any form. When this document contains information on a new product. specifications herein are subject to Change without notice.

, -.

MOIrcip3OLA Semiconductor Products Inc.

Avenue G&dral-Eisenhower - 31023 Toulouse CEDEX -

Printed in Switrerland

FIGURE 2 - CIRCUlT

OUT

CONFIGURATIONS

17

lto6 8 to 15, 23.24

“cc

DATA OUT

. a) Output Buffers for LED’s

b) Output Stage of Data Output

FIGURE 3 -DEFINITION OF SVVITCHING TIMES

LOGIC “ 1 ” - 8lJFFER ON

DATA

MOTOROLA

Semiconductor Products Inc,

CIRCUIT DESCRIPTION he -UAA2022 is intended to control common anode ED’s and allows brightness Variation from an external ontrol voltage. Since it is not multiplexed it is particularly Jited for hi-fi applications etc. ‘he circuit receives 16 bit serial data by means of the igital inputs Vm (Chip select), Glock and Data (TTL:vels). The information is fed into a shift-, and len is stored in latches which in turn control the output uffers. These output buffers (Segment driversl h a v e urrent Source characteristics (See figure 2a), thus no xternal resitors are needed to set up the Segment currents for 100 % luminosity). ‘igure 3 Shows the timing diagram of the circuit. On the negative going VOR-edge the latches are disconnected

from the shift and new information is shifted in. On the positive VDR-edge the latches are reconnected, thus transferring new information to the Outputs. (See f igure 2a.) The shift also has a data output. (See figure 2b.) This allows the microprocessor to data through the UAA 2022, and thus drive further circuits from the same d a t a a n d Chip-select Pins. T h e U A A 2 0 2 2 s h i f t s a n d Outputs data on the positive going clock edge. Thus for reliable data transfer, it has to be the first circuit in the line, when connected in series with circuits which shift on the negative going clock edge. The circuit is cascada b l e a n d tan b e c a s c a d e d w i t h t h e U A A 2 0 0 0 a n d UAA2001/2010.

INPUT/OUTPUT FUNCTIONS 3UFFER OUTPUTS - (Pins 1 to 6,8 to 15,23,24) These Outputs have current Source characteristics to drive :he LED Segments without external resistances.

which accepts shifts and Outputs data on the positive going edge. It should be noted that within the VDRwindow, when VDR is low, the clock has to be high at the beginning and the end of the clock pulse train.

CURRENT cONTROL - @in 16) Serves to vary the output currents of the buffers. This ein has to be connected to VCC (pin 17) for maximum iuminosity. The buffer currents decrease linearly with :he control voltage, going down to zero at about 2V. L E D - TEST - (Pin 181 This pin supplies t@he logic section of the circuit, when connected to ground all output buffers are switched on.

V D R .- (Pin 20) This pin is the chip select and is active when low. DATA - (pin 2 1) Data is entered into the device serially via this pin and ed directly into the shift - In turn, this controls the latches and output buffers. (Logic “1” = Buffer ON) D A T A O U T - (Pin 22)

CL$XK - (pin 191 I Thrs pin delivers the clock Signal to the shift ,

Is the data output of the shift - Allows cascading with circuits operating on the Same VDR and clock Signals.

MOTO#?OLA Semiconductor Prsducts

ELECTRICAL CHARACTERISTICS (Vcc’5V, TA= 25’c)

High State Logic Input Currents Low’State High State

Control Volt-, LED Test Low Level (no Logic Supply, all Buffers ON) High Level (normal Operation)

Mean Value of min. and max. Buffer Currents (“CO = “cc, “LE = 0) Buffer Current Variation around 1BB Saturation Voltage Output Impedance Leakage Current (VBB = 5”)

Supply Current

All Voltages referenced to ground (Pin 7) 1)

Brightness goes to zero at 2V

MOTOROLA

Semiconductor

Products

Inc,

@Y

MAXIMUM RATINGS (TA= 25OC) Rating

I

Logic Input Voltages Con trol Vol tage

Pin

I

19,20,21 I

16

Symbol

I

Vco

I

10

‘LOG I

Value

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I

10

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Unit

1

V V

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Supply Voltage Control Voltage Data-Out, max. Vottage (10 = 2mAI Buffers

1 to6 8to 15 23,24

Output Voltage Wcc = VCo = 5.5VI

V

6

v13B

All Buffers ON Storage

Temperature

I

I

TSTG

I

-5oto

+150

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Oc

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Operating Ambient Temperature

All’voltages referenced to ground (Pin 7)

SWITCHING CHARACTERISTICS (TA= 0 to 7OoC, see figure 3 1 Symbol

Charactaristic

I 1

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Glock “High’‘-Time Glock “Lew”-Time

‘CH I

Negative going Vx Edge to first Glock Edae l-ast Cldc Edge to positive going Vm Edge Data Change to positive going Glock Edge

131

ld

Ill

14

‘CL ‘LVC

l

‘LCV

1

‘LDC

l

‘FV4 ‘FC* ‘ F D

... . I

I

Fall Timet of Digital Inputs VOR, Glock, Data

MOTOROLA Semiconductor

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Products Inc-